1. Field of the Invention
This invention relates to a method of driving a plasma display panel (hereinafter referred to as PDP) and its apparatus. The method and apparatus of the present invention can reduce the backglow phenomena caused by the discharge operation during the reset period for PDP.
2. Description of Prior Art
The PDP displays images by means of charges accumulated through electrode discharge. It is one of the most interesting plate display devices because, among other advantages, it can provide a large screen aspect ratio and can display full-color images. The basic theory and operation of a PDP is described below.
FIG. 1 is a cross-sectional view of a conventional PDP cell constructed by two glass substrates 1 and 7 and the components formed thereon. Inactive gas, such as Ne, Xe, is filled in the cavity between the glass substrates 1 and 7. The components formed on the glass substrate 1 include sustaining electrodes X, scan electrodes Yi which are parallel to each other, a dielectric layer 3 and a protective film 5. The components formed on the glass substrate 7 include address electrodes Ai and the fluorescent material 9 formed thereon. The partition wall 8 is formed on the peripheral of each PDP cell to isolate the PDP cell. Therefore, each PDP cell 10 includes three kinds of electrodes, i.e., the sustaining electrodes and the scan electrodes which are parallel to each other, and the address electrodes Ai crossing the sustaining electrodes and the scan electrodes.
FIG. 2 is a block diagram illustrating a plasma display formed by the PDP cells shown in FIG. 1. As shown in the drawing, the PDP 100 is driven by the scan electrodes Y1xcx9cYn, the sustaining electrodes X and the address electrodes A1xcx9cAm. The position of the cell 10 is as shown in the drawing. Each, cell is isolated by the partition wall 8 as shown in FIG. 1. Furthermore, the plasma display includes the control circuit 110, the Y scan driver 112, the X sustaining driver 114 and the address driver 116. The control circuit 110 generates timing signals for the drivers according to the external clock signal CLOCK, the data signal DATA, the vertical synchronous signal VSYNC and the horizontal synchronous signal HSYNC, wherein the clock signal CLOCK represents the data transmittal clock, the data signal DATA represents the display data, and the vertical synchronous signal VSYNC and the horizontal synchronous signal HSYNC are respectively used to define the timing sequences of a frame and a scanning line. The control circuit 110 sends the display data and the clock signal to the address driver 116 and sends the corresponding frame control clock to the Y scan driver 112 and the sustaining driver 114. The display data is transmitted to the address driver 116 by the control circuit 110 and is written to each cell through the address electrodes A1xcx9cAm while the Y scan driver 112 sequentially scans the scan electrodes Y1xcx9cYn. The detailed operation and the control signals for the electrodes are described below.
FIG. 3 is a diagram illustrating the manner to drive a conventional PDP to display a frame. As shown in the drawing, each frame is divided into eight sub-fields SF1xcx9cSF8. However, the sub-field is different to the field of a conventional cathode ray tube (CRT), which displays an image by respectively scanning the odd scanning lines and the even scanning lines. The PDP field displays various gray scales for all of the scanning lines. Each sub-field includes three operating period, that is, the reset period R1xcx9cR8, the address period A1xcx9cA8 and the sustain period S1xcx9cS8. The reset period is used to clear the residual charges of the last field display and a certain amount of the wall charges left in each cell. The address period is used to accumulate wall charges into the cell, which is to be displayed (i.e., turned ON), through address discharge. The sustain period is to sustain discharge for displaying in the cell which has accumulated charges through the address discharge. All of the PDP cells are processed at the same time during the reset period R1xcx9cR8 and the sustain period S1xcx9cS8. The address operation is sequentially performed for each cell on the scan electrodes Y1xcx9cYn during the address period A1xcx9cA8. Moreover, the display brightness is proportional to the length of the sustain period S1xcx9cS8. In the example of FIG. 3, the length of the sustain periods S1xcx9cS8 of the sub-fields SF1xcx9cSF8 can be set in a ratio of 1:2:4:8:16:32:64:128 to display images in 256 gray scales.
FIG. 4 is a timing diagram of the control signals on the electrodes in a single sub-field of the prior art. The signals on the address electrodes Ai are generated by the address driver 116, the signals on the sustaining electrodes X are generated by the X sustaining driver 114, and the signals on the scan electrodes Y1xcx9cYn are generated by the scan driver 112. As shown in the drawing, each sub-field includes the reset period, the address period and the sustain period. The waveform of the signals in each period and the resulted manners are described in detail below.
At the time point a (in FIG. 4) of the reset period, the voltage of the scan electrodes Y1xcx9cYn is set to 0 V, and a write pulse having a voltage of VS+VW is applied to the sustaining electrode X, in which the voltage VS+VW is larger than the discharge start voltage between the sustaining electrode X and the scan electrode Yi. Therefore, the global writing discharge W occurs between the sustaining electrode X and the scan electrodes Yi. This discharge process accumulates negative charges on the sustaining electrode X and positive charges on the scan electrodes Yi. The electric field produced by the accumulated negative charges and the positive charges will cancel out the voltage drop between the sustaining electrodes, thus the time of global writing discharge W is very short.
At the time point b, the sustaining electrode X is set to 0 V, and a sustaining pulse 202 having a voltage of Vs is applied to all of the scan electrodes Y1xcx9cYn, wherein the value of the voltage Vs plus the voltage caused by the charges accumulated between the sustaining electrodes must be larger than the discharge start voltage between the scan electrodes Yi and the sustaining electrode X. Thus, the total sustaining discharge S occurs between the sustaining electrode X and the scan electrodes Yi. Different from the previous discharge process, this discharge process accumulates positive charges on the sustaining electrode X and negative charges on the scan electrodes Yi.
At the time point c, the scan electrode Yi is set to 0 V, an erase pulse 203 having a voltage lower than Vs is applied to the sustaining electrode X, and an address pulse having a voltage of xe2x88x92Vs can be applied to the address electrode Ai. The erase pulse is used to neutralize a part of the charges. On the scan electrodes Y1xcx9cYn, required wall charges are left so that the write operation can proceed with a lower voltage in the sequential address period.
In the address period, the voltage of the sustaining electrode X and the scan electrodes Yi are pulled up to Vs at the time point d. Then a scan pulse 204 is sequentially applied to the scan electrodes Y1xcx9cYn from the time point e, and an address pulse having a voltage of VA is applied to the address electrode Ai at the same time. When a cell of a scanning line turns ON, the write discharge occurs, that is, the corresponding display data is written into the cell.
After scanning all of the scan electrodes Y1xcx9cYn, the sustain period begins. The sustaining electrode X and the scan electrode Yi are first set to 0 V. Then the sustaining pulses 205 having the same voltage are applied to the sustaining electrode X and the scan electrodes Yi in an alternate way, i.e., at the time point f and at the time point g. Thus, the cell with the data ON during the address period will irradiate. It should be noted that the waveform of driving signals described above is only an example. The waveform varies in practice, but the same theory is applied.
As described above, the length of the sustain period is proportional to the displayed brightness. Assume that a frame includes 510 sustain periods, in which each sustaining discharge period has two periods of discharge. The number of sustain periods for the sub-fields SF1xcx9cSF8 can be 2, 4, 8, 16, 32, 64, 128, and 256, respectively. Therefore, there are 1020 periods of discharge of the sustain period during the display period of a frame. This discharge operation enables a PDP device to display images.
On the other hand, 2 to 3 discharges, such as global writing discharge, total sustaining discharge and erase discharge, are performed during the reset period to uniformly distribute the wall charges. The discharges during the reset period can also make the PDP device irradiate with a brightness brighter than that produced by the discharge during the sustain period. Roughly speaking, the brightness produced by three periods of discharge during the reset period is about the brightness by five periods of discharge during the sustain period. The ratio of the highest brightness and the lowest brightness for the PDP device is about 1020:(5xc3x978) =26:1, in which 1 corresponds to the brightness of black. Therefore, the brightness produced by the discharge during the reset period should be as low as possible in order to improve the image quality of black, which is an important factor for displaying images. It is thus a significant issue to reduce the brightness produced by the discharge during the reset period.
Accordingly, the object of this invention is to provide an apparatus for driving a PDP, which includes: a control circuit for receiving the external displaying data and the relevant timing data; an address driver, connected to the control circuit, for driving the address electrodes; an X driver, connected to the control circuit, for driving the sustaining electrodes, wherein a global writing pulse is applied to the sustaining electrodes during the reset period to produce the wall charges for the cells of the PDP through the discharge between the sustaining electrodes and scan electrodes; and a Y scan driver, connected to the control circuit, for driving the scan electrodes. The global writing pulse has a waveform rising up from a first voltage to a second voltage with a large slope, then rising up from the second voltage to a third voltage with a relatively small slope or a waveform rising up from a first voltage to a second voltage with a small slope, then rising up from the second voltage to a third voltage with a relatively large slope.
Moreover, this invention provides an apparatus for driving a PDP. The X driver applies the first component of the global writing pulse to the sustaining electrodes during the reset period. The first component of the global writing pulse has a waveform rising up from the first voltage to the second voltage with a large slope. The Y scan driver applies the second component of the global writing pulse to the scan electrodes during the reset period. The second component of the global writing pulse has a waveform falling down to the second voltage with a small slope. The wall charge on the cells of the PDP is produced through the discharge caused by the global writing pulse between the sustaining electrodes and the scan electrodes.